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HIP1013
Data Sheet May 1999 File Number
4516.2
Low Cost Dual Power Distribution Controller
The HIP1013 is a low cost HOT SWAP dual supply power distribution controller. Two external N-Channel MOSFETs are driven to distribute power while providing load fault isolation. At turn-on, the gate of each external N-Channel MOSFET is charged with a 10A current source. Capacitors on each gate (see the Typical Application Diagram), create a programmable ramp (soft turn-on) to control inrush currents. A built in charge pump supplies the gate drive for the 12V supply N-Channel MOSFET switch. Over current protection is facilitated by two external current sense resistors. When the current through either resistor exceeds the user programmed value the N-Channel MOSFETs are latched off by the HIP1013. The controller is reset by a rising edge on either PWRON pin. Choosing the voltage selection mode the HIP1013 controls either +12V/5V or +3.3V/+5V supplies. Although pin compatible with the HIP1012 device, the HIP1013 does not offer current regulation during an OC event.
Features
* HOT SWAP Dual Power Distribution Control for +5V and +12V or +5V and +3.3V * Provides Fault Isolation * Charge Pump Allows the Use of N-Channel MOSFETs * Redundant Power On Controls * Power Good and Over Current Latch Indicators * Adjustable Turn-On Ramp * Protection During Turn-On
Applications
* Power Distribution Control * Hot PlugTM Components
Pinout
HIP1013 (SOIC) TOP VIEW
3/12VS 3/12VG
1 2
14 3/12VISEN 13 RILIM 12 GND 11 CPUMP 10 NC 9 PGOOD 8 5VISEN
VDD 3 MODE/ 4 PWRON1 PWRON2 5
Ordering Information
PART NUMBER HIP1013CB HIP1013CB-T TEMP. RANGE (oC) -0 to 70 -0 to 70 PACKAGE 14 Ld SOIC PKG. NO. M14.15
5VG 6 5VS 7
14 Ld SOIC M14.15 Tape and Reel
Typical Application Diagram
CPUMP
RSENSE RLOAD HIP1013 12V 3/12VS VDD CGATE 3/12VG VDD POWER ON INPUTS M/PON1 3/12VISEN RILIM GND CPUMP 5V RILIM
NC PWRON2 PGOOD 5VG 5VS 5ISEN
5V CGATE
RSENSE RLOAD
2-406
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. Hot PlugTM is a trademark of Core International, Inc. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
RSENSE
TO LOAD
12VIN
Functional Diagram
2-407
12VS 12V 100A OC 12VG 10A + 18V 18V POR GND ENABLE QPUMP VDD 12ISEN
-
RILIM RILIM
CGATE
VDD MODE/ PWRON1 RISING EDGE RESET
R QN R Q S
HIP1013
CPUMP
TO VDD CPUMP
PWRON2 12V 12V 10A 5VG + PGOOD
NC
CGATE
PGOOD
-
OC 5VS HIP1013 5ISEN
RSENSE
TO LOAD
5VIN
HIP1013 Pin Description
PIN NO. 1 SYMBOL 12VS FUNCTION 12V Source DESCRIPTION Connect to source of associated external N-Channel MOSFET switch to sense output voltage. Connect to the gate of associated N-Channel MOSFET switch. A capacitor from this node to ground sets the turn-on ramp. At turn-on this capacitor will be charged to 17.4V by a 10A current source when in 5V/12V mode of operation, otherwise capacitor will be charged to 11.4V. Connect to 12V supply. This can be either connected directly to the +12V rail supplying the load voltage or to a dedicated VDD +12V supply. PWRON1 and PWRON2 are used to turn-on and reset the chip. Both outputs turn-on when either pin is driven low. After an over current limit fault, the chip is reset by the rising edge of a reset signal applied to either PWRON pin. Each input has 100A pull up capability which is compatible with 3V and 5V open drain and standard logic. PWRON1 is also used to invoke 3.3V control operation in preference to +12V control. By tying pin 4 to pin 3 the charge pump is disabled and the UV threshold also shifts to 2.8V. Connect to the gate of the external 5V N-Channel MOSFET. A capacitor from this node to ground sets the turn-on ramp. At turn-on this capacitor will be charged to 11.4V by a 10A current source. Connect to the source side of 5V external N-Channel MOSFET switch to sense output voltage. Connect to the load side of the 5V sense resistor to measure the voltage drop across this resistor between 5VS and 5VISEN pins. PGOOD is driven by an open drain N-Channel MOSFET. It is pulled low when either output voltage is not within specification or and OC condition exists. No Connection. CPUMP GND RILIM Charge Pump Capacitor Chip Ground Current Limit Set Resistor A resistor connected between this pin and ground determines the current level at which current limit is activated. This current is determined by the ratio of the RILIM resistor to the sense resistor (RSENSE). The current at current limit onset is equal to 10A x (RILIM / RSENSE). Connect to the load side of sense resistor to measure the voltage drop across this resistor. Connect a 0.1F capacitor between this pin and VDD (Pin 3).
2
12VG
12V Gate
3
VDD
Chip Supply
4
MODE/ PWRON1
Power ON/ Reset invokes 3.3V operation when shorted to VDD , Pin 3. Power ON/Reset
5
PWRON2
6
5VG
5V Gate
7
5VS
5V Source
8
5VISEN
5V Current Sense
9
PGOOD
Power Good Indicator
10 11 12 13
14
12VISEN
12V Current Sense
2-408
HIP1013
Absolute Maximum Ratings
TA = 25oC
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC (SOIC - Lead Tips Only)
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +13.2V 3/12VG, CPUMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 18.5V 3/12VISEN, 3/12VS . . . . . . . . . . . . . . . . . . . . . . . -5V to VDD + 0.3V 5VISEN, 5VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5V to 7.5V PGOOD, RILIM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7.5V MODE/PWRON1, PWRON2, 5VG . . . . . . . . . .-0.3V to VDD + 0.3V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV (Class 2)
Operating Conditions
VDD Supply Voltage Range . . . . . . . . . . . . . . . . . . +10.5V to +13.2V Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. JA is measured with the component mounted on an evaluation PC board in free air. 2. All voltages are relative to GND, unless otherwise specified.
Electrical Specifications
PARAMETER CONTROL SECTION Current Limit Threshold Voltage (Voltage Across Sense Resistor)
VDD = 12V, CVG = 0.01F, RSENSE = 0.1, CBULK = 220F, ESR = 0.5, TA = TJ = 0oC to 70oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
VIL OCLrt RTSHORT tON12V tON5V ION 12VVUV 5VVUV 3.3VVUV V12VG 3/5VG
RILIM = 10k Current Overload, RILIM = 10k, RSHORT = 6.0 CVG = 0.01F CVG = 0.01F CVG = 0.01F CVG = 0.01F
85 8 10.5 4.35 2.65
100 2 500 12 5 10 10.8 4.5 2.8 17.3 11.9
115 1000 12 11.0 4.65 2.95 17.9 -
mV s ns ms ms A V V V V V
Over Current Limit Response Time Response Time To Dead Short 12V Gate Turn-On Time 5V Gate Turn-On Time Gate Turn-On Current 12V Under Voltage Threshold 5V Under Voltage Threshold 3.3V Under Voltage Threshold Charge pumped 12VG Voltage 3/5VG High Voltage
CPUMP = 0.1F
16.8 11.2
SUPPLY CURRENT AND IO SPECIFICATIONS VDD Supply Current VDD POR Rising Threshold VDD POR Falling Threshold PWRON Pull-up Voltage PWRON Rising Threshold PWRON Hysteresis PWRON Pull-Up Current RILIM Pin Current Source Output Charge Pump Output Current Charge Pump Output Voltage Charge Pump Output Voltage - Loaded Charge Pump POR Rising Threshold Charge Pump POR Falling Threshold IVDD PORrvth PORfvth PWRN_V PWR_Vth PWR_hys PWRN_I RILIM_Io Qpmp_Io Qpmp_Vo Qpmp_VIo Qpmp+Vth Qpmp-Vth CPUMP = 0.1F, CPUMP = 16V No load Load current = 100A PWRON pins open 4 9.5 9.3 1.8 1.1 0.1 60 90 400 17.2 16.2 15.6 15.2 8 10.0 9.8 2.4 1.5 0.2 80 100 590 17.4 16.7 16 15.7 10 10.5 10.3 3.2 2 0.3 100 110 800 16.5 16.2 mA V V V V V A A A V V V V
2-409
HIP1013 Typical Performance Curves
8.4 8.2 SUPPLY CURRENT(mA) 105
8.0 7.8 7.6 7.4 7.2 -40 CURRENT (A)
104
103
-30
-20 -10
0
10
20
30
40
50
60
70
80
102 -40
-30 -20 -10
0
10
20
30
40
50
60
70
80
TEMPERATURE (oC)
TEMPERATURE (oC)
FIGURE 1. SUPPLY CURRENT
FIGURE 2. RILIM SOURCE CURRENT
11.00
4.615
2.888
12V UV THRESHOLD (V)
4.610
5V UV
2.886
10.98
4.605 3.3V UV 4.600
2.884
10.96
2.882
10.94 -40
-20
0
20
40
60
80
4.595 -40
-20
0
20
40
60
80
2.880
TEMPERATURE (oC)
TEMPERATURE (oC)
FIGURE 3. 12V UV THRESHOLD
FIGURE 4. 3.3V/5V UV THRESHOLD
17.36
11.935 11.930 3.3V, 5V GATE DRIVE (V)
17.6
17.34 12V GATE DRIVE (V) 12V VG 17.32 11.925 11.920 11.915 5V VG 17.28 11.905 17.26 -40 11.900 80 11.910
17.4 CHARGE PUMP VOLTAGE NO LOAD VOLTAGE (V) 17.2
17.30
17.0 CHARGE PUMP VOLTAGE 100A LOAD
16.8
-20
0
20
40
60
16.6 -40
-20
TEMPERATURE (oC)
0 20 40 TEMPERATURE (oC)
60
80
FIGURE 5. 12V, 5V GATE DRIVE
FIGURE 6. CHARGE PUMP VOLTAGE
2-410
3.3V UV THRESHOLD (V)
5V UV THRESHOLD (V)
HIP1013 Typical Performance Curves
102.5 VOLTAGE THRESHOLD (mV)
(Continued)
10.2 VDD LOW TO HIGH
102.0
POWER ON RESET (V)
12 OC VTth
10.0
101.5
101.0
5 OC Vth
9.8
VDD HIGH TO LOW
100.5 -40
-20
0
20
40
60
80
9.6 -40
-30 -20 -10
0
10
20
30
40
50
60
70
80
TEMPERATURE (oC)
TEMPERATURE (oC)
FIGURE 7. OC VOLTAGE THRESHOLD WITH = RILIM 10k
FIGURE 8. POWER ON RESET VOLTAGE THRESHOLD
HIP1013 Description and Operation
The HIP1013 offers the designer a cost efficient 5V and 12V true hot plug controller. This device drives two external N-Channel MOSFET switches and uses a charge pump to provide 17V to drive the gate of the 12V supply switch. The HIP1013 features Over Current (OC) programing with a single external resistor, RILIM and during turn-on, the gate capacitor of each external N-Channel MOSFET is charged with a 10A current source. These capacitors create a programmable ramp (soft turn-on). Upon initial power up, the HIP1013 can either isolate the voltage supply from the load by holding the external N-Channel MOSFET switches off or apply the supply rail voltage directly to the load for true hot swap capability. In either case the HIP1013 turns on in a soft start mode protecting the supply rail from sudden current loading. The load currents pass through two external current sense resistors. When the voltage across either resistor exceeds the user programmed Over Current (OC) voltage threshold value, (see Table 1) the HIP1013 controller turns both N-Channel MOSFETs off in 2s.
TABLE 1. RILIM RESISTOR 15K 10K 7.5K 4.99K NOTE: Nominal OC Vth = RILIM x 10 A NOMINAL OC VTH 150mv 100mV 75mV 50mV
directly to VDD. Upon any OC or Under Voltage (UV) condition the PGOOD fault indicating signal will pull low when tied high through a resistor to the logic supply.
HIP1013 Application Considerations
There is no unique and specific HIP1013 application evaluation board. Since the HIP1013 is pin compatible with the HIP1012 device, you can substitute a HIP1013 for the existing HIP1012 in either of the HIP1012EVAl1 or EVAL2 boards. Otherwise contact your Intersil Corporation sales office and an already modified board will be provided. Although pin compatible to the HIP1012, the HIP1013 is a less featured dual power supply distribution controller and does not include programmable current limiting regulation and delay time to latch off. Random resets can also occur if the HIP1013 (PINS 8 and 14) sense pins are pulled below ground when turning off a highly inductive load. Place a large load capacitor (10-50F) on the output to eliminate unintended resets. Physical layout of RSENSE resistors is critical to avoid the possibility of false over current occurrences. Ideally trace routing between the RSENSE resistors and the HIP1013 VS and VISEN pins are direct and as short as possible with zero current in the sense lines.
CORRECT INCORRECT
The HIP1013 is reset by a rising edge on either PWRON pin and is turned on by either PWRON pin being driven low. The HIP1013 can control either +12V/5V or +3.3V/+5V supplies. Tying the PWRON1 pin to VDD, invokes the +3.3V/+5V voltage mode. In this mode, the external charge pump capacitor is not needed and CPUMP, pin 11 is also tied
TO HIP1013 VS AND VISEN
TO HIP1013 VS AND VISEN CURRENT SENSE RESISTOR
2-411
HIP1013
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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